![]() ![]() Today Stead圜lock is still the same, with a few small improvements in the latest FS version, like even more efficient filtering, and a design based on a super low jitter reference clock. Stead圜lock FS - Excellent performance, redefined And the quality of the external (input) clock doesn't matter anymore. The cleaned and jitter-freed clock signal can be used as reference clock in any application. At the same time, analog conversion is performed on a guarateed level of highest quality, completely independent from the kind and quality of the used reference clock. Its highly efficient jitter suppression refreshes and cleans up any clock signal, and provides the clock signal as reference clock at the word clock output. The Stead圜lock technology of RME's latest products guarantees an excellent performance in all clock modes. It locks in fractions of a second to the input signal, follows even extreme varipitch changes with phase accuracy, and locks directly within a range of 28 kHz up to 200 kHz. Stead圜lock reacts quite fast compared to other techniques. ![]() Using other input sources like AES, SPDIF, word clock or ADAT, one most probably never experiences such high jitter values.īut Stead圜lock is not only ready for them, it would handle them just on the fly. Common jitter values are 5 ns, while a very good clock source will have less than 2 ns. Stead圜lock has originally been developed to gain a stable and clean clock from the heavily jittery MADI data signal.The embedded MADI clock suffers from about 80 ns jitter, caused by the time resolution of 125 MHz within the format. ![]()
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